CODEC ADAU1361のデフォルト設定

R0:Clock Control (0x4000)
  [03:03] : Clock source select -- direct from MCLK pin
  [02:01] : Input clock frequency -- 256 x fs
  [00:00] : Core clock enable -- core clock disabled <- disabled のときはR0,R1しかアクセスできない

R1 : PLL Control (0x4002)
  [45:32] : Denominator of the fractional PLL -- M=253
  [31:16] : Numerator of the fractional PLL -- N=12
  [14:11] : Integer part of PLL -- R=2
  [10:09] : PLL input clock divider --X=1
  [08:08] : Type of PLL -- Integer
  [01:01] : Lock PLL -- unlocked (read-only bit)
  [00:00] : PLL enable -- disabled 

R2 : Digtal Microphone/Jack Detection Control (0x4008)
 [07:06] : Jack detect debounce time 5ms <-?
 [05:04] : JACKDET?MICIN pin function jack detect off 
 [00:00] : Jack detect polarity detect high signal <-?

R3 : Record Power Management (0x4009)
 [06:05] : Mixer amplifier bias boost Normal operation
 [04:03] : ADC bias control Normal operation
 [02:01] : Record path bias control Normal operation

R4 : Record Mixer Left(Mixer 1) Control 0 (0x400A)
 [06:04] : Gain for a left channel single-ended input from the LINP pin signal -- Mute 
 [03:01] : Gain for a left channel single-ended input from the LINN pin signal -- Mute
 [00:00] :  Left channel mixer enable in the record path mixer -- disabled

R5 : Record Mi9xer Left(Mixer 1) Control 1 (0x400B)
 [04:03] : Left channel differential PGA input gain boost -- Mute
 [02:00] : Left single-ended auxiliary input gain from the LAUX pin in the record path -- Mute

R6 : Record Mixer Right(Mixer 2) Control 0 (0x400C)
 [06:04] : Gain for right channel single-ended input from the RINP pin signal -- Mute
 [03:01] : Gain for right channel single-ended input from the RINN pin signal -- Mute
 [00:00] : Right channel mixer enable in the record path disabled

R7 : Record Mixer Right(Mixer 2) Control 1(0x400D)
 [04:03] : Right channel differential PGA input gain boost -- Mute
 [02:00] : Right single-ended auxiliary input gain from the RAUX pin inthe record path -- Mute

R8 : Left Differential Input Volume Control (0x400E)
 [07:02] : Left channel differential PGA input volume control -- -12dB
 [01:01] : Left differential input mute control -- mute
 [00:00] : Left differential PGA enable -- disabled

R9 : Right Differential Input Volume Control (0x400F)
 [07:02] : Right channel differential PGA input volume control -- -12dB
 [01:01] : Right differential input mute control -- mute
 [00:00] : Right differential PGA enable -- disabled 

R10 : Record Microphone Bias Control (0x4010)
 [03:03] : Microphone bias -- normal operation
 [02:02] : Microphone voltage bias as a fraction of AVDD -- 0.90 x AVDD
 [00:00] : Enables the MICBIAS output -- disabled

R11 : ALC Control 0
 [07:06] : PGAvolume slew time when the ALC is off -- 24ms
 [05:03] : The maximum ALC gain sets a limit to the amount of gain -- -12dB
 [02:00] : ALC select -- Off

R12 : ALC Control 1 (0x4012)
 [07:04] : ALC hold time -- 2.67ms
 [03:00] : ALC target -- -28.5dB

R13 : ALC Control 2 (0x4013)
 [07:04] : ALC attack time -- 6ms
 [03:00] : ALC decay time -- 

R14 : ALC Control 3 (0x4014)
 [07:06] : Noise gate type -- Hold PGA constant
 [05:05] : Noise gate enable -- disabled
 [04:00] : Noise gate threshold -- -76.5dB

R15 : Serial Port Control 0 (0x4015)
 [07:07] : Dither enable is applicable only for 16-bit data width modes -- disabled
 [05:05] : LRCLK mode sets the LRCLK -- 50% duty cycle
 [04:04] : BPOL BCLK polarity sets the BCLK edge that triggers a change in audio data -- falling edge
 [03:03] : LRCLK polarity sets the LRCLK edge -- falling adge
 [02:01] : Channels per frame sets the number of channels per LRCLK frame -- Stereo
 [00:00] : Serial data port bus mode -- slave mode

R16 : Serial Port Control 1 (0x4016)
 [07:05] : Number of bit clock cycles per LRCLK audio frame -- 64
 [04:04] : ADC serial audio data channel position in TDM mode -- left first
 [03:03] : DAC serial audio data channel position in TDM mode -- left first
 [02:02] : MSB position in the LRCLK frame -- MSB first
 [01:00] : Data delay from LRCLK edge -- 1

R17 : Converter Control 0 (0x4017)
 [06:05] : On-chip DAC serial data selection in TDFM mode -- First pair
 [04:04] : DAC oversampling ratio -- 128x
 [03:03] : ADC oversampling ratio -- 128x
 [02:00] : Converter sampling rate -- fs(48KHz)

R18 : Converter Control 1 (0x4018)
 [01:00] : On-chip ADC serial data selection in TDM mode -- First pair

R19 : ADC Control (0x4019)
 [06:06] : Invert input polarity -- nomal
 [05:05] : ADC high-pass filter select -- off
 [04:04] : Digital microphone data polarity swap -- nomal
 [03:03] : Digital microphone channel swap -- nomal
 [02:02] : Digital microphone input select -- digital microphone inputs off ADCs enabled
 [01:00] : ADC enable -- Both off

R20 : Left Input Digital Volume (0x401A)
 [07:00] : Controls the digital volume -- 0dB

R21 : Right Input Digital Volume (0x401B)
 [07:00] : Controls the digital volume -- 0dB

R22 :  Playback Mixer Left (Mixer 3) Control 0 (0x401C)
 [06:06] : Mutes the right DAC input to the left channel playback mixer(Mixer 3) -- muted
 [05:05] : Mutes the left DAC input to the left channel playback mixer(Mixer 3) -- muted
 [04:01] : Mixer input gain -- Mute
 [00:00] : Mixer 3 enable -- disabled

R23 : Playbback Mixer Left(Mixer 3) Control 1 (0x401D)
 [07:04] : Bypass gain control -- Mute
 [03:00] : Bypass gain control -- Mute

R24 : Playback Mixer Right(Mixer 4) Control 0 (0x401E)
 [06:06] : Mutes the right DAC input to the right channel playback mixer(Mixer 3) -- muted
 [05:05] : Mutes the left DAC input to the right channel playback mixer(Mixer 3) -- muted
 [04:01] : Mixer input gain -- Mute
 [00:00] : Mixer 4 enable -- disabled

R25 : Playback Mixer Right (Mixer 4) Control 1 (0x401F)
 [07:04] : Bypass gain control. The signal from the right channel record mixer -- Mute
 [03:00] : Bypass gain control. The signal from the left channel record mixer -- Mute

R26 : Playback L/R Mixer Left (Mixer 5) Line Output Control (0x4020)
 [04:03] : Mixer input gain boost. The signal from the right channel playback mixer -- Mute
 [02:01] : Mixer input gain boost. The signal from the left channel playback mixer -- Mute
 [00:00] : Mixdr 5 enable -- disabled

R27 : Playback L/R Mixer Right (Mixer 6) Line Output Control (0x4021)
 [04:03] : Mixer input gain boost. The signal from the right channel playback mixer -- Mute
 [02:01] : Mixer input gain boost. The signal from the left channel playback mixer -- Mute
 [00:00] : Mixdr 6 enable -- disabled

R28 : Playback L/R Mixer Mono Output (Mixer 7) Control (0x4022)
 [02:01] : L/R mono playback mixer (Mixer 7) -- Common-mode output
 [00:00] : Mixer 7 enable -- disabled

R29 : Playback Headphone Left Volume Control (0x4023)
 [07:02] : Headphone volume control for left channel -- -57dB
 [01:01] : Headphone mute for left channel,LHP output (active low) -- unmute
 [00:00] : Headphone output enable -- disabled

R30 : Playback Headphone Right Volume Control (0x4024)
 [07:02] : Headphone volume control for right channel -- -57dB
 [01:01] : Headphone mute for right channel -- unmute
 [00:00] : RHP and LHP output mode -- line output

R31 : Playback Line Output Left Volume Control (0x4025)
 [07:02] : Line output volume control for left channel -- -57 dB
 [01:01] : Line output mute for left channel -- unmute
 [00:00] : Line output mode for left channel -- line output

R32 : Playback Line Output Right Volume Control (0x4026)
 [07:02] : Line output volume control for right channel -- -57 dB
 [01:01] : Line output mute for right channel -- unmute
 [00:00] : Line output mode for right channel -- line output

R33 : Playback Mono Output Control (0x4027)
 [07:02] Mono output volume control -- -57dB
 [01:01] Mono output mute (active low) -- unmute
 [00:00] Headphone mode enable -- line output

R34 : Playback Pop/Click Suppression (0x4028)
 [04:04] Pop suppression circuit power saving mode -- normal
 [03:03] Pop suppression disable -- enabled
 [02:01] Analog volume slew rate for playback volume controls -- 21.25ms

R35 : Playback Power Management (0x4029)
 [07:06] Headphone bias control -- Normal operation
 [05:04] DAC bias control -- Normal operation
 [03:02] Playback path channel bias control -- Normal operation
 [01:01] Playback right channel enable -- disabled
 [00:00] Playback left channel enable -- disabled

R36 : DAC Control 0 (0x402A)
 [07:06] DAC mon mode -- Stereo
 [05:05] Invert input polarity of the DACs. -- nomal
 [02:02] DAC de-emphasis filter enable -- disabled
 [01:00] DAC enable -- Both off

R37 : DAC Control 1 (0x402B)
 [07:00] Controls the digital volume attenuation for left channel inputs from the left DAC -- 0dB

R38 : DAC Control 2 (0x402C)
 [07:00] Controls the digital volume attenuation for right channel inputs from the right DAC -- 0dB

R39 : Serial Port Pad Control (0x402D)
 [07:06] ADC_SDATA pad pull-up/pull-down configuration -- None
 [05:04] DAC_SDATA pad pull-up/pull-down configuration -- None
 [03:02] LRCLK pad pull-up/pull-down configuration -- None
 [01:00] BCLK pad pull-up/pull-down configuration -- None

R40 : Control port Pad Control 0 (0x402F)
 [07:06] CDATA pad pull-up/pull-down configration -- None
 [05:04] CLATCH pad pull-up/pull-down configration -- None
 [03:02] SCL/CCLK pad pull-up/pull-down configration -- None
 [01:00] SDA/COUT pad pull-up/pull-down configuration -- None

R41 : Control Port Pad Control 1 (0x4030)
 [00:00] SDA/COUT pin drive strength -- low

R42 : Jack Detect Pin Control (0x4031)
 [05:05] JACKDET/MICIN pin drive strength -- low
 [03:02] JACKDET/MICIN pad pull-up/pull-down configuration -- None

R67 : Dejitter Control (0x4036)
 [07:00] Dejitter window size -- 3