テストボードを作って2ヶ月放置していましたが、春休みで時間ができたのでちょっと触ってみました。

開発環境はXilinxのISE13.4です。

はじめにプロジェクトを新規作成して、FPGAのチップの指定を行います。
言語はverilogです。

1


コードを書いてエラーがでなければ
PlanAheadというツールでFPGAのピンに割り当てていきます。
割り当てだけでなくプルアップの有効、無効。ピンの駆動電流も設定できます。

2



特にエラーがなければ、
iMPACTというツールでFPGAに書き込みます。

3



実際に動作させるとこんな感じ




チャタリングのせいでぐだぐだです。リセットボタンでLEDが全部クリアされます。
マイコンより難しいなという印象です。何か目標がないとモチベーションが、、、

とりあえず今回のverilogのコードとピンの割り当ては以下に、
今回使ってない物も割り当てられてます。


module test(LED,SW,PUSH_SW,CLOCK,RESET);

input CLOCK;
input RESET;
input [7:0]SW;
input [3:0]PUSH_SW;
output [7:0]LED;

reg [7:0]work;

always @(negedge PUSH_SW[0] or negedge RESET)
begin
if (RESET == 1'b0)
work<=0;
else
work<= work + 1;
end

assign LED=~work;

endmodule




NET "PUSH_SW[0]" IOSTANDARD = LVCMOS33;
NET "PUSH_SW[1]" IOSTANDARD = LVCMOS33;
NET "PUSH_SW[2]" IOSTANDARD = LVCMOS33;
NET "PUSH_SW[3]" IOSTANDARD = LVCMOS33;
NET "LED[0]" IOSTANDARD = LVCMOS33;
NET "LED[1]" IOSTANDARD = LVCMOS33;
NET "LED[2]" IOSTANDARD = LVCMOS33;
NET "LED[3]" IOSTANDARD = LVCMOS33;
NET "LED[4]" IOSTANDARD = LVCMOS33;
NET "LED[5]" IOSTANDARD = LVCMOS33;
NET "LED[6]" IOSTANDARD = LVCMOS33;
NET "LED[7]" IOSTANDARD = LVCMOS33;
NET "PUSH_SW[0]" DRIVE = 2;
NET "PUSH_SW[1]" DRIVE = 2;
NET "PUSH_SW[2]" DRIVE = 2;
NET "PUSH_SW[3]" DRIVE = 2;
NET "LED[0]" DRIVE = 2;
NET "LED[1]" DRIVE = 2;
NET "LED[2]" DRIVE = 2;
NET "LED[3]" DRIVE = 2;
NET "LED[4]" DRIVE = 2;
NET "LED[5]" DRIVE = 2;
NET "LED[6]" DRIVE = 2;
NET "LED[7]" DRIVE = 2;
NET "LED[0]" SLEW = SLOW;
NET "LED[1]" SLEW = SLOW;
NET "LED[2]" SLEW = SLOW;
NET "LED[3]" SLEW = SLOW;
NET "LED[4]" SLEW = SLOW;
NET "LED[5]" SLEW = SLOW;
NET "LED[6]" SLEW = SLOW;
NET "LED[7]" SLEW = SLOW;
NET "PUSH_SW[0]" PULLUP;
NET "PUSH_SW[1]" PULLUP;
NET "PUSH_SW[2]" PULLUP;
NET "PUSH_SW[3]" PULLUP;


NET "LED[0]" LOC = P24;
NET "LED[1]" LOC = P22;
NET "LED[2]" LOC = P17;
NET "LED[3]" LOC = P15;
NET "LED[4]" LOC = P12;
NET "LED[5]" LOC = P10;
NET "LED[6]" LOC = P5;
NET "LED[7]" LOC = P3;
NET "PUSH_SW[0]" LOC = P62;
NET "PUSH_SW[1]" LOC = P60;
NET "PUSH_SW[2]" LOC = P57;
NET "PUSH_SW[3]" LOC = P53;
NET "SW[0]" LOC = P54;
NET "SW[1]" LOC = P58;
NET "SW[2]" LOC = P61;
NET "SW[3]" LOC = P63;
NET "SW[4]" LOC = P34;
NET "SW[5]" LOC = P36;
NET "SW[6]" LOC = P41;
NET "SW[7]" LOC = P48;


NET "SW[0]" IOSTANDARD = LVCMOS33;
NET "SW[1]" IOSTANDARD = LVCMOS33;
NET "SW[2]" IOSTANDARD = LVCMOS33;
NET "SW[3]" IOSTANDARD = LVCMOS33;
NET "SW[4]" IOSTANDARD = LVCMOS33;
NET "SW[5]" IOSTANDARD = LVCMOS33;
NET "SW[6]" IOSTANDARD = LVCMOS33;
NET "SW[7]" IOSTANDARD = LVCMOS33;
NET "SW[0]" DRIVE = 2;
NET "SW[1]" DRIVE = 2;
NET "SW[2]" DRIVE = 2;
NET "SW[3]" DRIVE = 2;
NET "SW[4]" DRIVE = 2;
NET "SW[5]" DRIVE = 2;
NET "SW[6]" DRIVE = 2;
NET "SW[7]" DRIVE = 2;
NET "SW[0]" PULLUP;
NET "SW[1]" PULLUP;
NET "SW[2]" PULLUP;
NET "SW[3]" PULLUP;
NET "SW[4]" PULLUP;
NET "SW[5]" PULLUP;
NET "SW[6]" PULLUP;
NET "SW[7]" PULLUP;


NET "CLOCK" LOC = P88;
NET "RESET" LOC = P89;


NET "CLOCK" IOSTANDARD = LVCMOS33;
NET "RESET" IOSTANDARD = LVCMOS33;
NET "CLOCK" DRIVE = 2;
NET "RESET" DRIVE = 2;
NET "CLOCK" PULLUP;
NET "RESET" PULLUP;